Характеристики
CD40193BEThe CD40193BE is a CMOS presettable binary Up/Down Counter with dual clock and reset consist of 4 synchronously clocked, gated «D» type flip-flops connected as a counter. The inputs consist of 4 individual jam lines, a preset, enable control, individual clock up and clock down signals and a master reset. Four buffered Q signal outputs as well as carry and borrow outputs for multiple-stage counting schemes are provided. The counter is cleared so that all outputs are in a low state by a high on the reset line. A reset is accomplished asynchronously with the clock. Each output is individually programmable asynchronously with the clock to the level on the corresponding jam input when the preset, enable control is low. The counter counts up one count on the positive clock edge of the clock up signal provided the clock down line is high. The counter counts down on count on the positive clock edge of the clock down signal provided the clock up line is high.
• Individual clock lines for counting up or counting down
• Synchronous high-speed carry and borrow propagation delays for cascading
• Asynchronous reset and preset capability
• Medium-speed operation
• Standardized, symmetrical output characteristics
• 100% Tested for quiescent current at 20V
• Maximum input current of 1µA at 18V