Микросхема SN74ALS74AN (КР1533ТМ2), DUAL POS-EDG-TRG D F-F, DIP-14

Характеристики

SN74ALS74AN (КР1533ТМ2), DUAL POS-EDG-TRG D F-F, DIP-14The SN74ALS74AN is a dual positive-edge-triggered D-type Flip-flop with clear and preset. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of clock. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.